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rev. 0.1 10/12 copyright ? 2012 by silicon laboratories cp2114-ek cp2114-ek cp2114 e valuation k it u ser ? s g uide 1. kit contents the cp2114 evaluation kit is available in four configurations shown in table 1: this document applies to all cp2114 kits. 2. software setup the example applications as well as additional documentation can be found here: www.silabs.com/cp2114 ?? an721 software (an721sw) ?? usb and gpio configuration utility: see an721 for mo re information on customizing usb and gpio settings. ?? audio (dac/codec) configuration utility: see section 4 fo r more information using the dac configuration utility. ?? cp2114 data sheet ?? cp2114 evaluation kit user's guide ?? an433: cp2110/4 hid-to-uart api specification ?? an434: cp2110/4 interface specification ?? cp2114 quick start guide table 1. evaluation kits kit name components cp2114-ek ?? cp2114 evaluation board ?? usb cable ?? rs-232 serial cable cp2114-cs42l55ek ?? cp2114 evaluation board ?? daughter card with cirrus logic cs42l55 codec ?? ear bud headphones ?? audio cable (3.5 mm male to male) ?? usb cable ?? rs-232 serial cable cp2114-wm8523ek ?? cp2114 evaluation board ?? daughter card with wolfson microelectronics wm8523 dac ?? ear bud headphones ?? usb cable ?? rs-232 serial cable CP2114-PCM1774EK ?? cp2114 evaluation board ?? daughter card with texas instruments pcm1774 dac ?? ear bud headphones ?? usb cable ?? rs-232 serial cable
cp2114-ek 2 rev. 0.1 3. cp2114 hardware interface for information on using the cp2114, see th e cp2114 quick start guide, available at www.silabs.com/cp2114 . figure 1, figure 2, figure 3, and figure 4 show each evaluation board as well as important features. figure 1. cp2114 evaluation board features daughter card connector microphone input path volume control buttons tx and rx toggle leds usb connector dac select jumpers usb active and suspend leds rs-232 connector
cp2114-ek rev. 0.1 3 figure 2. cs42l55 daughter card features figure 3. wm8523 daughter card features headphone out connector daughter card connector analog input connector line out connector cs42l55 codec headphone out connector daughter card connector line out connector wm8523 dac
cp2114-ek 4 rev. 0.1 figure 4. pcm1774 daughter card features headphone/ line out connector daughter card connector analog input connector pcm1774 dac
cp2114-ek rev. 0.1 5 4. dac configuratio n application (an721sw) the dac configuration utility is an ap plication within the an721 software (a n721sw) package that allows audio configuration strings to be sent to the cp2114 one-time programmable memory or ram. the audio string is used by the cp2114 to configure the da c/codec. to access the dac config uration utility, run the an721sw and connect to the cp2114 device. after connecting to the device, select advanced configuration , then dac configuration. after this, the dac configuration utility shown in figure 5 will ap pear. this an721sw package is available at www.silabs.com/cp2114 . figure 5. an721: dac configuration 4.1. application command descriptions 4.1.1. get cp2114 capabilities this button will report the cu rrent configuration of the one-time programma ble memory. with the default pin configuration and no jumpers installed on gpio.5, gpio.6 , gpio.7, or gpio.8, the ut ility will display the following: * cp2114 caps availablebootindices: 0x20 availableotpconfigs: 0x1d currentbootconfig: 0xff availableotpconfigspace: 0x1532 the availablebootindices: 0x20 parameter indicates that all 32 boot index slots are available for programming. the availableotpconfigs: 0x1d parameter indicates that there are 29 cp2114 configurations available in the one-time programmable memory.
cp2114-ek 6 rev. 0.1 the cp2114 evb ships with three default config urations in otp at the following indices: index 0: audio out and audio in streams both set to asynchronous with cs42l55 dac settings. index 1: audio out and audio in streams both set to asynchronous with wm8523 dac settings. index 2: audio out and audio in streams both se t to asynchronous with pcm1774 dac settings. the currentbootconfig parameter with a value of 0x ff indicates the cp2114 will not configure any dac devices on a reset or boot.this occurs when ?? dac select input feature is turned on and no ju mpers are installed on gpio .5, gpio.6, gpio.7, and gpio.8. ?? dac select input feature is turned on and the gpio va lue is set to ?use otp bo ot config? while no valid boot config entry is found in the one-time programmable memory. ?? dac select input feature is turned off and there is no valid boot config entry in the one-time programmable memory. the cp2114 has 32 programmable boot configuration entr ies by default. (the cp2114 boot configuration can be changed up to a total of 32 times.) the final parameter, availableotpconfigspace: 0x1532 indicates there are 0x1532 (5426) bytes of programmable memory available to support new configurations. 4.1.2. reset device this button forces a cp2114 reset. 4.1.3. load config text from file loads configuration text from a file into the config text window. 4.1.4. save config text to file saves the text in the config text window to a file. 4.1.5. write config text to ram writes the configuration displayed in the config text window into the cp2114 ram. the dac configurations are also written to the dac. this operat ion will cause the cp2114 to disconnect and reconnect on the usb bus. this configuration is not retained on device reset. 4.1.6. write config text to otp writes the configuration in the config text window to the one-time programma ble memory. the configuration does not become the active configuration in ram unless it?s sp ecified in cp2114 boot conf ig or via dac select gpio pins followed by power cycling or resetting the device. 4.1.7. read cp2114 config from otp after specifying the configurat ion number in the text box to the right of the button and clicking the button, the utility will display the one-time progr ammable memory configuratio n in the output window. 4.1.8. set cp2114 boot config after specifying the configuration number in the text box to the right of the button and clicking the button, the boot configuration index is programmed into the one-time programmable memory space. note: the cp2114 boot configuration index can be changed up to 32 times. 4.1.9. get dac registers displays one or more dac registers in the output window. to display a contiguous range of dac registers enter the starting register address in the start address field and the number of registers to read in the num registers field. click get dac registers and the register values will be displayed in the status wi ndow as hex comma-separated values. 4.1.10. save final device customization to file save the final 5.5 kb of customized data into a file for one-time programming in production.
cp2114-ek rev. 0.1 7 4.2. using the application use the following steps to program the cp2114 using th e dac configuration utility: 1. click get cp2114 capabilities and note the boot index, available ot p boot index slots, and available otp config space. 2. click load config text from file if there is one available; otherwise write the config text into the config text window directly. 3. click write config text to ram . this will cause cp2114 to re-enumerate over usb. once cp2114 device is seen by the host again, verify the device's audi o functionalities including volume control and mute control. adjust the value in config text if necessary and repeat write config text to ram until desired result is achieved. 4. verify the dac registers have the desired setting by entering the s tart address and num registers and clicking get dac registers . 5. click save config text to file to save a copy of the text in the config text window. 6. click write config text to otp after all functionalities have been completely verified in ram. the new config will consume one boot config index slot and so me one-time prog rammable config sp ace. the index of this new config should be the ne xt available index. for example, if get cp2114 capabilities returned availableotpconfigs of 0x1d, th is configuration index will be 3. 7. enter the index of the new config and click read cp2114 config from otp . verify the data returned is as expected. 8. click get cp2114 capabilities and verify the available otp config space is (2+config data bytes) less than the previous value. the firmware inserts 2-byte length before the config da ta when writing to otp. available otp configs should be 1 less than the previous value. 9. enter the configuration index of the new config and click set cp2114 boot config to make cp2114 to boot from the new config. 10. reset the cp2114. 11. verify cp2114 boots up properly with dac function ing properly. verify volume and mute integration with the host. click save final device configuration to file for otp programming in production. 4.3. audio confi guration string format the audio configuration string input fo rmat is comma or space-separated hex values (a combination of comma and space separation is not allowed).the cp2114 data sheet available at www.silabs.com/cp2114 discusses the audio configuration string in detail.
cp2114-ek 8 rev. 0.1 5. evaluation board overview 5.1. cp2114-eb overview the cp2114 evaluation kit includes an evaluation board with a cp2114 device pre-installed for user evaluation and software development. numerous input/out put (i/o) connections are provided to facilitate prototyping using the eval- uation board. refer to figure 6 for the locations of the various i/o connectors. j1 daughter card connector j2 usb connector for usb interface j3 db9 connector for rs-232 interface jp00-jp30 cp2114 pin connector jp40 vio power connector jp41 regin power connector and self-powered mode connector jp42 test point connector jp43 si500 enable connector jp44 sckin to sck connector jp45 dac selection connector jp46 green usb active led connector jp47 red usb suspend led connector jp48 daughter card reset connector jp49 cp2114 gpio signal header jp50, jp52 daughter card gpio signal header d2 red record mute led d3 red receive toggle led d4 red transmit toggle led d5 red usb suspend led d6 green usb active led sw1-sw4 audio control buttons sw5 reset button
cp2114-ek rev. 0.1 9 figure 6. cp2114 evaluation board with default shorting blocks installed 5.1.1. daughter card connector (j1) the j1 connector is used to connect to a cp2114 daughter card. 5.1.2. universal serial bus (usb) interface (j2) a universal serial bus (usb) connector (j2) is provided to facilitate con nections to the usb interface on the cp2114. see table 2 for the usb pin definitions. table 2. usb connector pin descriptions pin # description 1 vbus 2d? 3d+ 4 gnd (ground) j2 j3 d2 vol + s2 vol - s1 rec mute s4 pb mute s3 cp2114 u1 jp43 d3 rxt d4 txt reset s5 jp41 jp42 jp40 jp10 jp11 jp14 jp15 jp16 jp17 jp12 jp13 jp44 jp00 jp03 jp02 jp01 jp04 jp05 jp06 jp07 jp20 jp21 jp24 jp25 jp26 jp30 jp22 jp23 jp46 jp47 d6 active d5 suspend jp49 jp52 jp50 dac select jp45 www.silabs.com silicon labs cp2114-eb jp48 j1 si500 u3
cp2114-ek 10 rev. 0.1 5.1.3. uart signals (j3) an rs-232 transceiver circuit and db9 connector (j3) are provided on the evaluation board to connect the cp2114 to external serial devices. see table 3 for the rs-232 j3 pin descriptions. 5.1.4. cp2114 pin connectors (jp00-jp30) the jp00-jp30 connectors connect and disconnect cp2114 pi ns from external circuits . by default, all of these jumpers are populated. 5.1.5. vio power connector (jp40) this header (jp40) is included on the evaluation board to provide vio power options. p opulating the shorting block connects the cp2114 vio input (pin 6) to cp2114 vdd (p in 7). remove the shorting block to power vio from an external source and connect the power source to pin 2 of the header. 5.1.6. regin power connector and self-powered mode connector (jp41) the jp41 header is used to connect the cp2114 regin pi n (pin 8) to the vbus source from the usb connector (default) or to the cp2114 vdd pin (pin 7). when conn ected to the vbus source, the device is intended for bus- powered operation. when connected to the cp2114 vdd pin, the device is intended for self-powered operation. in self-powered operation, an external power source can be connected to the jp41 header to power the vdd pin directly. 5.1.7. test point connector (jp42) the jp42 header contains test points and is not used in normal operation. 5.1.8. si500 enable connector (jp43) the jp43 header contro ls the power to the si500 cmos clock. shor ting pin 1 to pin 2 on the header will connect cp2114 vdd (pin 7) to the si500. sh orting pin 2 to pin 3 on the header w ill place the si500 in powerdown mode. the setting of jp43 depends on the desired clocking mode. 5.1.9. sck to sckin connector (jp44) the jp44 jumper should be left installed. 5.1.10. dac selectio n connector (jp45) the jp45 header is used to select the cp2114 boot conf iguration after a reset. when a jumper is populated, the corresponding gpio pin in connected to ground. when a jumper is removed, the corresponding gpio pin is weakly pulled high. note: if any of the four dac select pins ar e configured for a function other than da c selection, the cp2114 will not use the dac select pins to choose a boot configuration. 5.1.11. green usb active led and connector (jp46, d6) the jp46 header is used to connect the cp2114 suspend pi n (pin 18) to the d6 green led. when the led is on, the device has enumerated with the pc operating norm ally. when the led is off, the device has not yet enumerated or is in the usb suspend state. 5.1.12. .red usb suspend led and connector (jp47, d5) table 3. rs-232 pin descriptions pin signal cp2114 direction description 2 rxd input receive data 3 txd output transmit data 5 gnd ground 7 rts output request to send 8 cts input clear to send
cp2114-ek rev. 0.1 11 the jp47 header is used to connect the cp2114 suspend pin (pin 17) to the d5 red led. when the led is on, the device has enumerated with the pc operating norm ally. when the led is off, the device has not yet enumerated or is in the usb suspend state. 5.1.13. daughter card reset connector (jp48) the jp48 header connects reset to the gpio4_c pin on the daughter card connector (j1). on the cs42l55 daughter card, gpio4_ c is connected to th e cs42l55 reset pin. the gpio 4_c pin is unconnected on the wm8523 and pcm1774 daughter cards because the dacs do not have a hardware reset input. 5.1.14. cp2114 gpio signal connector (jp49) the connector jp49 provides easy access to all of the cp2114 gpio signals. 5.1.15. daughter card signal header (jp50, jp52) the headers jp50 and jp52 allow the connection of gpio 0-4 signals to the corresponding daughter card signals (gpiox_c). these jumpers can be us ed to route the appropriate gpio signals to a custom daughter card. 5.1.16. audio control buttons and red record mute led (sw1-sw4, d2) sw1 through sw4 send aud io control commands when pr essed. in addition, the re d record mute led (d2) will turn on when the record mute button is pressed (sw4). 5.1.17. red receive toggle and transmit toggle leds (d3, d4) the leds d3 and d4 will toggle when tr ansmitting and receiving ua rt data. in order to use this functionality, the gpio pins must first be co nfigured for tx toggle and rx toggle modes. by default, these pins are used for dac select 0 and dac select 1. 5.1.18. reset button (sw5) sw5 externally pulls the cp2114 reset pin (pin 10) low when pressed. if sw 5 is held down, the cp2114 will remain in reset until the button is released. table 4. audio control buttons led pins s1 volume ? s2 volume + s3 playback mute s4 record mute
cp2114-ek 12 rev. 0.1 5.2. cs42l55-eb overview the cs42l55 evaluation board contains a pre-installed cs42l55 for evaluation and preliminary software develop- ment with the cp2114 evaluation board. refer to figure 7 for the locations of the various i/o connectors on the cs42l55-eb. p1 daughter card connector p2 analog input connector p3 line output connector p4 headphone output connector j1-j5 i2s/i2c signal connectors j9, j10 i2s/i2c signal connectors figure 7. cs42l55 evaluation board with default shorting blocks installed 5.2.1. daughter card connector (p1) the p1 connector is used to connect to a cp2114 evaluation board (cp2114-eb). the cs42l55-eb must be plugged into a cp2114 evaluation board to function properly. 5.2.2. analog input connector (p2) the p2 connector is used to connect an inpu t device to the cs42l55 evaluation board. 5.2.3. line output connector (p3) the p3 connector is used to connect powered speakers to the cs42l55 evaluation board. 5.2.4. headphone output connector (p4) the p4 connector is used to connect head phones to the cs42l55 evaluation board. 5.2.5. i2s/i2c signal connectors (jp1-jp5, jp9, jp10) connectors jp1 through jp7, jp9, and jp10 are provid ed to allow access to the i2s/i2c signals between the cp2114 and cs42l55. plac ing a shorting block between pins 1 and 2 will connect the cp2114 to the cs42l55. placing a shorting block between pi ns 2 and 3 will connect the correspo nding cs42l55 pin to ground. when monitoring the i2s signals, connect the scope probe ground lead to the adjacent ground pin. cs42l55 u1 www.silabs.com silicon labs cp2114-cs42l55-evb p1 p3 p4 j1 j2 j4 j3 j10 j5 j9 p2 ain hp out line out
cp2114-ek rev. 0.1 13 5.3. wm8523-eb overview the wm8523 evaluation board contains a pre-installed wm8523 for evaluation and preliminary software develop- ment with the cp2114 evaluation board. refer to figure 8 for the locations of the various i/o connectors on the wm8523 -eb. j1 daughter card connector j2 line output connector j3 headphone output connector jp2-jp10 i2s and i2c signal connectors jp11 voltage regulator input connector jp12 wm8253 supply voltage header jp13 wm8253 supply voltage connector jp14 headphone amplifier shdn header jp15 ground header jp16-jp20 gpio header for shdn control figure 8. wm8253 evaluation board with default shorting blocks installed 5.3.1. daughter card connector (j1) the j1 connector is used to connect to a cp2114 evaluation board (cp2114-eb). the wm8253-eb must be plugged into a cp2114 evaluation board to function properly. 5.3.2. line output connector (j2) the j2 connector is used to connect powe red speakers to the wm8253 evaluation board. 5.3.3. headphone output connector (j3) the j3 connector is used to connect headphones to the wm8253 evaluation board. 5.3.4. i2s/i2c signal connectors (jp2-jp10) connectors jp2 through jp10 are provided to allow access to the i2s/i2c signals between the cp2114 and wm8253. placing a shorting block be tween pins 1 and 2 will connect the cp2114 to the wm8253. placing a shorting block between pins 2 and 3 will connect the correspondi ng wm8253 pin to groun d. when monitoring the i2s signals, connect the scope probe ground lead to the adjacent ground pin. wm8523 u1 www.silabs.com silicon labs cp2114-wm8523-evb j1 j3 j2 jp13 jp9 jp10 jp14 jp7 jp8 jp5 jp6 jp3 jp4 jp2 jp15 jp12 jp19 jp20 jp16 jp17 jp18 hp out line out jp11
cp2114-ek 14 rev. 0.1 5.3.5. voltage regulator connector (jp11) the jp11 connector is used to connect the vbus signal be ing supplied to the cp2114 to the input of the voltage regulator on the wm8253 eval uation board. installing this jumper connects the vbus signa l to the regu lator output. if another voltage supply is used, jp11 should be remove d and the supply should be connected to pin 2 of the header. 5.3.6. wm8253 supply voltage header (jp12) the jp12 header provides access to the wm8253 supply voltage. 5.3.7. wm8253 supply voltage connector (jp13) this header (jp13) is included on the evaluation board to provide several power options for the wm8253. the following describes the function of each pin: ?? shorting pins 1,2: connects the regulator output on the wm8253-eb to the supply of the wm8253. ?? shorting pins 2,3: connects the cp2114 vdd (cp2114 pin 7) to the supply of the wm8253. 5.3.8. headphone amplifier shdn header (jp14, jp16?jp20) the jumpers jp14 and jp16-jp20 control the headphone amplifier sh utdown (shdn) pin. the headphone amplifier is enabled when shdn is high and disabled when shdn is low. in the default configuration (jumper shorting pins1 and 2), the headphone amp is always enabled. shorting pins 2 and 3 on jp14 will disable the headphone amplifier. removing jp14 and connecting one of jp16-jp20 allows the host to control the headphone amp via gpio pin. in this case, the corresponding gpio-gpio_c jumper must also be installed on the cp2114-ek board. 5.3.9. ground header (jp15) the jp15 header provides access to ground.
cp2114-ek rev. 0.1 15 5.4. pcm1774-eb overview the pcm1774 evaluation board includes contains a pre-installed a pcm1774 for evaluation and preliminary soft- ware development with the cp2114 evaluation board. refer to figure 9 for the locations of the various i/o connec- tors on the pcm1774 -eb. j1 daughter card connector j2 headphone/line output connector j3 analog input connector jp1-jp7 i2s signal connectors jp8 voltage regulator connector jp9 pcm1774 supply voltage connector jp15, jp16 external capacitor connectors figure 9. pcm1774 evaluation board with default shorting blocks installed 5.4.1. daughter card connector (j1) the j1 connector is used to connect to a cp2114 evaluation board (cp2114-eb). the pcm1774-eb must be plugged into a cp2114 evaluation board to function properly. 5.4.2. headphone/line output connector (j2) the j2 connector is used to connect headphones or powered speakers to the pcm1774 evaluation board. 5.4.3. analog input connector (j3) the j3 connector is used to connect an input device to the pcm1774 evaluation board. 5.4.4. i2s/i2c signal connectors (jp1?jp7) connectors jp1 through jp7 are provided to allow access to the i2s/i2c signals between the cp2114 and pcm1774. placing a shorting block between pins 1 and 2 will connect the cp2114 to the pcm1774. placing a shorting block between pins 2 and 3 will connect the corr esponding pcm1774 pin to gr ound. when monitoring the i2s signals, connect the scope probe ground lead to the adjacent ground pin. 5.4.5. voltage regulator connector (jp8) the jp8 connector is used to connect the vbus signal being supplied to t he cp2114 to the input of the voltage regulator on the pcm1774 evaluation bo ard. installing this jumper connects the vbus signal to the regulator output. if another voltage supply is used, jp8 should be removed and the supply should be connected to pin 2 of the header. pcm1774 u1 www.silabs.com silicon labs cp2114-pcm1774-evb j1 j3 j2 jp9 jp6 jp7 jp4 jp2 jp3 jp1 jp5 jp15 jp16 analog in hp/line out jp8
cp2114-ek 16 rev. 0.1 5.4.6. pcm1774 supply voltage connector (jp9) this header (jp9) is included on t he evaluation board to provide several power options for the pcm1774. the following describes the function of each pin: ?? shorting pins 1,2: connects the regulator output on the pcm1774-eb to the supply of the pcm1774. ?? shorting pins 2,3: connects the cp2114 vdd (cp2114 pin 7) to the supply of the pcm1774. 5.4.7. external capacitor connectors (jp15, jp16) the jp15 and jp16 connectors allow external capacitors to be connected to the hp/line out connector. for best low frequency response (35 hz cutoff), remove the jumpers on jp15 and jp16. for maximum power output (45 hz cutoff), place the jumpers on jp15 and jp16.
cp2114-ek rev. 0.1 17 6. schematics figure 10. cp2114 evaluation board schematic
cp2114-ek 18 rev. 0.1 figure 11. cs42l55 evaluation board schematic
cp2114-ek rev. 0.1 19 figure 12. wm8523 evaluation board schematic
cp2114-ek 20 rev. 0.1 figure 13. pcm1774 evaluation board schematic
cp2114-ek rev. 0.1 21 7. bill of materials table 5. cp2114 evaluation board (cp2114-eb) bill of materials reference part number source description c18 c0603x5r6r3-475k venkel 4.7 f 6.3 v 10% x5r 0603 c19 c20 c21 c22 c0603x7r250-104k venkel 0.1 f 25 v 10% x7r 0603 c6 c8 c13 c23 c25 c0603x5r160-105k venkel 1 f 16 v 10% x5r 0603 c7 c9 c10 c11 c12 c14 c15 c16 c17 c24 c26 c0402x7r160-104k venkel 0.1 f 16 v 10% x7r 0402 d1 sp0503bahtg littlefuse 300 mw 20 v tvs sot143-akkk d2 d3 d4 d5 sml-lx0603iw lumex inc. red 30 ma led 0603 d6 sml-lx0603gw lumex inc. green 25 ma led 0603 j1 pcn10c-20s-2.54ds(72) hirose electric co ltd conn, din header, 20pos, dual r/a, female j2 292304-1 tyco usb type b connector j3 d09p33e4gx00lf fci db9 male ra d-sub j4 jp00 jp03 jp04 jp05 jp06 jp07 jp10 jp11 jp12 jp13 jp14 jp15 jp16 jp17 jp20 jp21 jp22 jp23 jp24 jp25 jp26 jp30 jp40 jp44 jp46 jp47 jp48 jp52 tsw-102-07-t-s samtec jumper header conn1x2 jp01 jp02 jp41 jp42 jp43 jp50 tsw-103-07-t-s samtec jumper header conn1x3 jp45 tsw-104-07-t-d samtec jumper header conn4x2 jp49 tsw-112-07-t-s samtec jumper header conn1x12
cp2114-ek 22 rev. 0.1 js1 js2 js3 js4 js5 js6 js7 js8 js9 js10 js11 js12 js13 js14 js15 js16 js17 js18 js19 js20 js21 js22 js23 js24 js30 js32 js33 js35 js37 js38 js39 js40 js41 snt-100-bk-t samtec jumper shunt r1 r2 r3 r4 r9 cr0402-16w-471j venkel 470 1/16 w 5% thickfilm 0402 r21 r22 r23 r24 r25 r26 r28 r30 r32 cr0603-10w-103j venkel 10k 1/10 w 5% thickfilm 0603 r27 r29 r31 r33 cr0603-10w-472j venkel 4.7k 1/10 w 5% thickfilm 0603 r34 r35 r36 r37 r38 r39 r40 r41 cr0201-20w-33r0f venkel 33 1/20 w 1% thickfilm 0201 r5 r6 cr0603-16w-102j venkel 1k 1/16 w 5% thickfilm 0603 r7 r8 cr0603-10w-1201f venkel 1.20k 1/10 w 1% thickfilm 0603 s1 s2 s3 s4 s5 evq-pad04m panasonic corp momentary tactile switch sw4n6.5x4.5 tp11 tp12 tp13 tp14 tp15 tp16 tp17 tp18 tp19 tp20 tp21 tp22 151-207-rc kobiconn red loop testpoint u1 cp2114-b01-gm silicon labor atories cp2114 usb audio to digital audio bridge qfn32n5x5p0.5 u2 sp3223eucy-l exar corporation rs232 transceiver tssop20n6.4p0.65 u3 500saac48m0000acf silabs 48 mhz 3.3 v cmos 150ppm si500s osc4n3.2x4.0 table 5. cp2114 evaluation board (cp2114-eb) bill of materials reference part number source description
cp2114-ek rev. 0.1 23 table 6. cirrus logic cs42l55 evaluation board (cs42l55-eb) bill of materials reference part number source description c8-10 c28- 29 c0603c104j3ractu kemet cap, 0.1 f, x7r, ceramic, 0603, 25 v, 5%, or eq, rohs. c15-16 c19 c33 c1608x7r1c105k tdk corporation cap ce ramic, 1.0 f, x7r, 0603, 16 v, 10%, or eq, rohs. c13-14 cc0805jrnpo9bn102 yageo cap cera mic, 1000 pf, npo, 0805, 50 v, 5%, or eq, rohs. c2 emk212bj106kg-t taiyo yuden cap, cer, 10f, 16v, x5r, 0805 or eq, rohs c20-21 ecj-2vc1h152j panasonic electronic components cap, 1500 pf, np0, ceramic, 0805, 50 v , 5%, or eq, rohs. c17-18 grm2165c1h182ja01d murata electronics north america cap, 1800 pf, np0, ceramic, 0805, 50 v , 5%, or eq, rohs. c3-7 c11-12 grm188r61c225ke15d murata electronics north america cap, 2.2 f , ceramic , 16 v , x5r, 0603, 10% , or eq, rohs. c1 emk212bj475kg-t taiyo yuden cap, cer, 4.7 f, 16 v, 10%, x5r, 0805 or eq, rohs. p1 pcn10-20p-2.54ds(72) hirose electric co ltd conn, din header, 20pos, dual r/a, male, rohs. u1 cs42l55-cnz cirrus logic inc stereo codec,qfn36-5x5 mm , rohs. j6 pbc02saan sullins connector solutions stake header, 1x2, 0.1"ctr, gold, or eq, rohs. j1-5 j9-10 pbc03saan sullins connector solutions stake header, 1x3, 0.1" ctrs, or eq, rohs. u2 lt1963aest-2.5 linear technology ldo reg, 2.5 v, 1.5 a, sot223 r10-11 erj-3ekf1000v panasonic electronic components res, 100 ohm, smt, 0603, 1/10 w, 1%, or eq, rohs. r8-9 rt0805fre0733r2l yageo res, 33.2 ohm, smt, 0805, 1/8 w, 1%, or eq, rohs. r12-13 erj-6enf5620v panasonic electronic components res, 562 ohm, smt, 0805, 1/8 w, 1%, or eq, rohs. r1-5 n/a solder bump jumper, nc, 0402 sh1-7 spc02syan sullins connector solutions conn, jumper shorting, tin, or eq, rohs. sf1-4 sj61a6 3m bumpon pr otective, bumper , silicone, or eq, rohs. p2-4 sj1-3535ng cui inc conn, ja ck stereo, 3 pos, 3.5 mm, pth, rohs. tp3 5002 keystone electronics test point, pc compact, .063"d white, or eq, rohs. components not installed (ni) r6-7 res, smt, 0603, or eq, rohs. (ni)
cp2114-ek 24 rev. 0.1 table 7. wolfson microelectronics wm8523 evaluation board (wm8523-eb) bill of materials reference part number source description c1 c2 c15 c16 c0805x5r160-475k venkel 4.7 f 16 v 10% x5r 0805 c19 c20 c1206x7r250-105k venkel 1 f 25 v 10% x7r 1206 c4 c7 c12 c13 c14 c0805x7r160-105m venkel 1 f 16 v 20% x7r 0805 c6 c0603x7r100-225k venkel 2.2 f 10 v 10% x7r 0603 c8 c9 c1206c0g500-473j venkel 47 nf 50 v 5% cog 1206 j1 pcn10-20p-2.54ds(72) hirose electric co ltd conn, din header, 20pos, dual r/a, male, rohs. j2 j3 sj1-3535ng cui audio jack jp11 jp12 jp15 jp16 jp17 jp18 jp19 jp20 tsw-102-07-t-s samtec jumper header conn1x2 jp2 jp3 jp4 jp5 jp6 jp7 jp8 jp9 jp10 jp13 jp14 tsw-103-07-t-s samtec jumper header conn1x3 js1 js2 js3 js4 js5 js6 js7 js8 js9 js10 js11 snt-100-bk-t samtec jumper shunt r1 r2 r5 r6 r7 r10 r11 cr0603-10w-1002f venkel 10k 1/10 w 1% thickfilm 0603 r8 r9 cr0603-10w-1270f venkel 127 1/10 w 1% thickfilm 0603 sf1 sf2 sf3 sf4 sj61a6 3m bumpon protective, bumper , sili- cone, or eq, rohs. u1 wm8523gedt wolfson microelectronics wm8523gedt dac tssop20n6.4p0.65 u2 lt1963aest-3.3#pbf linear techno logies 3.3 v 1.5 a max ldo sot223 u3 max9722aete maxim 130 mw 2.4 v-5.5 v amplifier qfn16n3x3p0.5e
cp2114-ek rev. 0.1 25 table 8. texas instruments pcm1774 evaluation board (pcm1774-eb) bill of materials reference part number source description c1 c2 c15 c16 c19 c20 c21 c0805x5r160-475k venkel 4.7 f 16 v 10% x5r 0805 c10 c11 ta016tcm106ka venkel 10 f 16 v 10% tant c3216 c17 c18 eca1cm221 panasonic 220 f 16 v 20% alum_elec c2.5x6.3 mm c22 c23 c24 c25 c0603x7r250-104k venkel 0.1 f 25 v 10% x7r 0603 j1 pcn10-20p-2.54ds(72) hirose electric co ltd conn, din header, 20pos, dual r/a, male, rohs. j2 j3 sj1-3535ng cui audio jack jp1 jp2 jp3 jp4 jp5 jp6 jp7 jp9 tsw-103-07-t-s samtec jumper header conn1x3 jp8 jp15 jp16 tsw-102-07-t-s samtec jumper header conn1x2 js1 js3 js4 js6 js7 js9 js10 js11 js12 snt-100-bk-t samtec jumper shunt r10 r11 r12 r13 r14 r15 cr0603-16w-22r0f venkel 22 1/16 w 1% thickfilm 0603 r3 cr0603-10w-1002f venkel 10k 1/10 w 1% thickfilm 0603 r8 r9 cr0805-10w-4r7j venkel 4.7 1/10 w 5% thickfilm 0805 sf1 sf2 sf3 sf4 sj61a6 3m bumpon protective, bumper , sili- cone, or eq, rohs. tp1 tp2 tp3 151-207-rc kobiconn red loop testpoint u1 pcm1774rgp texas instrument s pcm1774 dac qfn20n4x4p0.5 u2 lt1963aest-3.3#pbf linear techno logies 3.3 v 1.5 a max ldo sot223
cp2114-ek 26 rev. 0.1 c ontact i nformation silicon laboratories inc. 400 west cesar chavez austin, tx 78701 tel: 1+(512) 416-8500 fax: 1+(512) 416-9669 toll free: 1+(877) 444-3032 please visit the silicon labs technical support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. patent notice silicon labs invests in research and development to help our cust omers differentiate in the market with innovative low-power, s mall size, analog- intensive mixed-signal soluti ons. silicon labs' extensive pat ent portfolio is a testament to our unique approach and world-clas s engineering team. silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. the information in this document is believed to be accurate in all respects at the time of publ ication but is subject to change without notice. silicon laboratories assumes no responsibility for errors and om issions, and disclaims responsibi lity for any consequences resu lting from the use of information included herein. ad ditionally, silicon laboratorie s assumes no responsibility for the functioning of und escribed features or parameters. silicon laboratories reserves the right to make changes without further notice . silicon laboratories makes no wa rranty, rep- resentation or guarantee regarding the suitability of its products for any particular purpose, nor does silicon laboratories as sume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including wi thout limitation conse- quential or incidental damages. silicon laborat ories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of t he silicon laboratories product could create a s ituation where per- sonal injury or death may occur. should buyer purchase or us e silicon laboratories products for any such unintended or unauthor ized ap- plication, buyer shall indemnify and hold silicon laboratories harmles s against all claims and damages.

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